JEDEC JESD35-A : Procedure for the Wafer-Level Testing of Thin Dielectrics
سازمان: JEDEC - Solid State Technology Association
کلید واژه: Thin Dielectrics , Thin Gate Oxides , Wafer-Level Testing
سال: 2001
زبان: English
قیمت: 55000 تومان
The revised JESD35 is intended for use in the MOS Integrated Circuit manufacturing industry. It describes procedures developed for estimating the overall integrity and reliability of thin gate oxides. Three basic test procedures are described, the Voltage-Ramp (V-Ramp), the Current-Ramp (J-Ramp) and the new Constant Current (Bounded J-Ramp) test. Each test is designed for simplicity, speed and ease of use. The standard has been updated to include breakdown criteria that are more robust in detecting breakdown in thinner gate oxides that may not experience hard thermal breakdown.